1. Field
One or more embodiments described herein relate to a nonvolatile memory device for detecting a defective bit line at high speed and a test system thereof.
2. Description of the Related Art
A semiconductor memory device is capable of storing data and reading out the stored data when necessary. A semiconductor memory device may be classified into a volatile memory device and a nonvolatile memory device. A volatile memory device loses its stored data when its power supply is interrupted. A nonvolatile memory device retains its stored data even when its power supply is interrupted. A flash memory device is a typical nonvolatile memory device.
A nonvolatile memory device includes memory cells to store data and the memory cells are located at the intersections of word lines and bit lines. In the case that defects occur at a specific bit line during a process, if the defective bit line is not replaced with a redundancy bit line, the whole nonvolatile memory device may become unusable or unavailable due to some defective bit lines.
Thus, in a wafer process, a nonvolatile memory device goes through a test operation for replacing the defective bit line. Generally, the test operation is performed by test equipment. The test operation programs specific data in memory cells, reads the programmed data and then compares logical states of the programmed data and the data actually read out to judge whether a defective bit line exists. Thus, data read out by an individual bit line unit has to be transmitted to the test device. That is, data transmission processes as much as the number of all bit lines in a memory cell array are needed to detect a defective bit line. However, the test device, in the case of replacing a defective bit line with a redundancy bit line, performs a replacement operation by a unit of a preset number of bit lines. That is, even in the case that a defect exists in only one bit line, a plurality of bit lines including the defective bit line is replaced.
That is, since a read operation for detecting a defect of a bit line and a replacement operation of a defective bit line of the test device are performed by different units respectively, a test operation is performed unnecessarily for a long period of time.